SHORT Packed AVX MFLOP/s

EVENTSET
FIXC0 INSTR_RETIRED_ANY
FIXC1 CPU_CLK_UNHALTED_CORE
FIXC2 CPU_CLK_UNHALTED_REF
PMC0  FP_ARITH_INST_RETIRED_256B_PACKED_SINGLE
PMC1  FP_ARITH_INST_RETIRED_256B_PACKED_DOUBLE
PMC2  FP_ARITH_INST_RETIRED_512B_PACKED_SINGLE
PMC3  FP_ARITH_INST_RETIRED_512B_PACKED_DOUBLE

METRICS
Runtime (RDTSC) [s] time
Runtime unhalted [s] FIXC1*inverseClock
Clock [MHz]  1.E-06*(FIXC1/FIXC2)/inverseClock
CPI  FIXC1/FIXC0
Packed SP [MFLOP/s]  1.0E-06*(PMC0*8.0+PMC2*16.0)/time
Packed DP [MFLOP/s]  1.0E-06*(PMC1*4.0+PMC3*8.0)/time

LONG
Formulas:
Packed SP [MFLOP/s] = 1.0E-06*(FP_ARITH_INST_RETIRED_256B_PACKED_SINGLE*8+FP_ARITH_INST_RETIRED_512B_PACKED_SINGLE*16)/runtime
Packed DP [MFLOP/s] = 1.0E-06*(FP_ARITH_INST_RETIRED_256B_PACKED_DOUBLE*4+FP_ARITH_INST_RETIRED_512B_PACKED_DOUBLE*8)/runtime
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Packed 32b AVX FLOPs rates.
