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# pcb-rnd - the [nonetlist] patch

The [nonetlist] patch adds an element flag that makes PCB ignore the marked element when dealing with netlists. This means connecting a net to a pin of a nonetlist element will not cause a short. The refdes of a nonetlist part is drawn with color element-color-nonetlist (ElementColor_nonetlist in the source; default value #777777, grey).

Uses of the nonetlist feature:

- smd jumper: Combined with the [intconn] patch, this solves the "0-ohm 1206 jumper" problem: the element should be marked as nonetlist, with both pins set intconn(1) - this will result in a 2 pad element, pads internally connected, that can be part of any one network without causing short and passing the DRC.
- mechanical parts that should not show up on the schematics:
  - mounting hole elements: single pin holes with silk marking the head of the screw
  - chassis (often with mounting holes or keep-out areas)
  - logos in footprints (no poly support in footprint - yet?)
  - mechanical parts which do not have solderable pins (plastic spacers, extra connector shields)
  - "spare connectors", e.g. unused/disconnected DIP sockets, pin grids, or connectors in the corner of the PCB for prototyping (dev-board style)

Preservation: gsch2pcb-rnd leaves nonetlist elements in the PCB.

## save/load and compatibility

This patch introduces a new element flag. The following example demonstrates a 1206 jumper footprint:

    Element["nonetlist" "1206 jumper, 0 ohm" "" "1206" 0 0 -3150 -3150 0 100 ""]
    (
    	Pad[-5905 -1181 -5905 1181 5118 2000 5718 "1" "1" "square,intconn(1)"]
    	Pad[5905 -1181 5905 1181 5118 2000 5718 "2" "2" "square,intconn(1)"]
    	ElementLine[-2362 -3740 2362 -3740 800]
    	ElementLine[-2362 3740 2362 3740 800]
    )

Mainline PCB will load the design ignoring internal connections and nonetlist flag - this will cause shorts on all connected pins/pads and will break the connection.

Mainline PCB doesn't save nonetlist and elements are embedded in the file - once the design is loaded and saved with mainline PCB, the flag is lost. After reloading the file in pcb-rnd, the element causes the same shorts as in mainline PCB.

## plans

No plans, the feature is complete.